A Phase-Locked Loop with Multi-Frequency Outputs by Using New Interpolator Circuit
碩士 === 淡江大學 === 電機工程學系碩士班 === 100 === With the extensive growth of the demand for high speed system, the required clock rate continues increasing. Thus, the issue of the clock synchronization in the subsystems becomes more and more important, which results in a great improvement on the clock skew an...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/55609576105603433406 |