THE CONTROLLER IP DESIGN OF MULTIPLE DATA ACCESS PORT FOR DDR SDRAM
碩士 === 大同大學 === 電機工程學系(所) === 100 === At first we introduce the electrical characteristic of the random access memory, including static random access memory（SRAM）and double data rate dynamic random access memory（DDR SDRAM）,and consider to construct a multiple data access port memory controller to DD...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/12408988075884289355 |