A Parallel Dual-Scanline Algorithm for Partitioning Parameterized 45-Degree Polygons
碩士 === 元智大學 === 資訊工程學系 === 100 === In the analog integrated circuit design process, researchers have proposed the concept of parameterized layouts in order to mitigate the problem of redesign iterations. Additionally, in order to use corner stitching data structure in storing parameterized layouts,...
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| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/70737962716603308450 |