Self-Super-Cutoff Power Gating with State Retention for ULV CMOS Systems
博士 === 國立中正大學 === 電機工程研究所 === 101 === Using ultra-low voltage is a viable approach to reducing power consumption, and the most effective approach to reducing leakage is power gating. In this regard, the super cutoff (SC) CMOS uses additional boost signals to “super cutoff” the leakage current. In...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/17641715581396190928 |