Low-Voltage Low-Power Image Motion Estimation Circuit Design
碩士 === 長庚大學 === 電機工程學系 === 101 === In this thesis, we present a novel low power video motion estimation circuit to reduce the power consumption of the circuit and maintain the normal operation in a low-voltage environment by shortening the delay of operator. To achieve this goal, we present two arch...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Published: |
2013
|
Online Access: | http://ndltd.ncl.edu.tw/handle/78362255008263245428 |
id |
ndltd-TW-101CGU05442050 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-TW-101CGU054420502015-10-13T22:45:36Z http://ndltd.ncl.edu.tw/handle/78362255008263245428 Low-Voltage Low-Power Image Motion Estimation Circuit Design 低電壓低功率影像移動估測電路晶片設計 Sheng Hung Yu 游勝鴻 碩士 長庚大學 電機工程學系 101 In this thesis, we present a novel low power video motion estimation circuit to reduce the power consumption of the circuit and maintain the normal operation in a low-voltage environment by shortening the delay of operator. To achieve this goal, we present two architectures, which are Relax-ME and XOR-ME designs. In the Relax-ME architecture, an approach to split operation units is employed in order to divide the main arithmetic unit of the image motion estimation circuit into the upper and the lower significant-bit parts. These two parts simultaneously compute in the same clock cycle independently; thereby, the computation delay can be reduced significantly, so the video motion estimation circuit can operate in a low-voltage environment with lower power consumption. The segmentation of arithmetic units is done by modifying the original structure without adding any additional redundant circuit; accordingly, the hardware overhead of motion estimation circuit can be lowered and image quality of the video motion estimation circuit can be retained with no PSNR degradation. In the XOR-ME architecture, the computation of the major SAD arithmetic unit is improved by replacing the long-path-delay adder with the short-path-delay counters and comparators to maintain the normal operation in a low-voltage environment without any additional redundant circuit as well. In order to further reduce the power consumption of the ME circuit, an early termination method is proposed in both Relax-ME and XOR-ME architectures to omit unnecessary search calculations and save more power. Comparing the proposed Relax-ME and XOR-ME with the ISR-ANT ME design, the hardware overhead area in the proposed low-power video motion estimation circuits can be reduced by 23.25% and 30.05%, respectively. The power consumption in the proposed Relax-ME and XOR-ME designs can also be further saved by 42.18% and 49.11% respectively while comparing with the ISR-ANT ME design that all operate under low voltage supply environment and still met the motion estimation system PSNR performance requirement. I. C. Wey 魏一勤 2013 學位論文 ; thesis 105 |
collection |
NDLTD |
format |
Others
|
sources |
NDLTD |
description |
碩士 === 長庚大學 === 電機工程學系 === 101 === In this thesis, we present a novel low power video motion estimation circuit to reduce the power consumption of the circuit and maintain the normal operation in a low-voltage environment by shortening the delay of operator. To achieve this goal, we present two architectures, which are Relax-ME and XOR-ME designs. In the Relax-ME architecture, an approach to split operation units is employed in order to divide the main arithmetic unit of the image motion estimation circuit into the upper and the lower significant-bit parts. These two parts simultaneously compute in the same clock cycle independently; thereby, the computation delay can be reduced significantly, so the video motion estimation circuit can operate in a low-voltage environment with lower power consumption. The segmentation of arithmetic units is done by modifying the original structure without adding any additional redundant circuit; accordingly, the hardware overhead of motion estimation circuit can be lowered and image quality of the video motion estimation circuit can be retained with no PSNR degradation. In the XOR-ME architecture, the computation of the major SAD arithmetic unit is improved by replacing the long-path-delay adder with the short-path-delay counters and comparators to maintain the normal operation in a low-voltage environment without any additional redundant circuit as well. In order to further reduce the power consumption of the ME circuit, an early termination method is proposed in both Relax-ME and XOR-ME architectures to omit unnecessary search calculations and save more power. Comparing the proposed Relax-ME and XOR-ME with the ISR-ANT ME design, the hardware overhead area in the proposed low-power video motion estimation circuits can be reduced by 23.25% and 30.05%, respectively. The power consumption in the proposed Relax-ME and XOR-ME designs can also be further saved by 42.18% and 49.11% respectively while comparing with the ISR-ANT ME design that all operate under low voltage supply environment and still met the motion estimation system PSNR performance requirement.
|
author2 |
I. C. Wey |
author_facet |
I. C. Wey Sheng Hung Yu 游勝鴻 |
author |
Sheng Hung Yu 游勝鴻 |
spellingShingle |
Sheng Hung Yu 游勝鴻 Low-Voltage Low-Power Image Motion Estimation Circuit Design |
author_sort |
Sheng Hung Yu |
title |
Low-Voltage Low-Power Image Motion Estimation Circuit Design |
title_short |
Low-Voltage Low-Power Image Motion Estimation Circuit Design |
title_full |
Low-Voltage Low-Power Image Motion Estimation Circuit Design |
title_fullStr |
Low-Voltage Low-Power Image Motion Estimation Circuit Design |
title_full_unstemmed |
Low-Voltage Low-Power Image Motion Estimation Circuit Design |
title_sort |
low-voltage low-power image motion estimation circuit design |
publishDate |
2013 |
url |
http://ndltd.ncl.edu.tw/handle/78362255008263245428 |
work_keys_str_mv |
AT shenghungyu lowvoltagelowpowerimagemotionestimationcircuitdesign AT yóushènghóng lowvoltagelowpowerimagemotionestimationcircuitdesign AT shenghungyu dīdiànyādīgōnglǜyǐngxiàngyídònggūcèdiànlùjīngpiànshèjì AT yóushènghóng dīdiànyādīgōnglǜyǐngxiàngyídònggūcèdiànlùjīngpiànshèjì |
_version_ |
1718079942016630784 |