High Speed、High Resolution and Multi-phase Pulse-width Control Loop
碩士 === 華梵大學 === 電子工程學系碩士班 === 101 === This paper proposed the Pulse-width Control Loop (PWCL) based on the Delay Locked Loop (DLL). The advantages of this chip are that the function not only correct the duty-cycle, but also has the ability of control/select the duty-cycle, furthermore, it enhance th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/07269158586744019472 |