Systolic array architecture design of MAC and its application in interpolation
碩士 === 龍華科技大學 === 電子工程系碩士班 === 101 === We design the 16-bits Multiplier-ACcumulator (MAC) circuit with the carry-save array architecture. The cut set are used to transform the architecture into a fully pipelined 2D systolic array structure. We also apply the MAC circuit to the implementation of inte...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/13710613688451452236 |