Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications
碩士 === 國立勤益科技大學 === 電子工程系 === 101 === This work reports a versatile technique for enhancing charge storage nonvolatile memory device using a direct assembly of gold-nanoparticles (AuNPs) as a charge trapping layer and zinc oxide (ZnO) as semiconductor layer. We have used two types of linker to depos...
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ndltd-TW-101NCIT57750132016-03-14T04:13:56Z http://ndltd.ncl.edu.tw/handle/18660353100626830874 Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications 低溫製程氧化鋅薄膜電晶體及自組裝奈米金電荷捕捉層應用於快閃記憶體與熱處理電性之改善 Sheng-Jyun Wu 吳昇峻 碩士 國立勤益科技大學 電子工程系 101 This work reports a versatile technique for enhancing charge storage nonvolatile memory device using a direct assembly of gold-nanoparticles (AuNPs) as a charge trapping layer and zinc oxide (ZnO) as semiconductor layer. We have used two types of linker to deposit AuNPs, which are 3-aminopropyltrimethoxysilane (APTMS) and 3-mercaptopropyltriethoxysilane (MPTES) followed by gold colloidal. Atomic force microscopy (AFM) image showed the surface morphology of the well-separated immobilized AuNPs on a SiO2/p-Si. According to the programming operations, the memory device showed good programmable memory characteristics with 8 V memory windows with better characteristics, at last, thermal annealing for improving nonvolatile memory has been research. Hsin-Chiang You 游信強 2013 學位論文 ; thesis 89 en_US |
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碩士 === 國立勤益科技大學 === 電子工程系 === 101 === This work reports a versatile technique for enhancing charge storage nonvolatile memory device using a direct assembly of gold-nanoparticles (AuNPs) as a charge trapping layer and zinc oxide (ZnO) as semiconductor layer. We have used two types of linker to deposit AuNPs, which are 3-aminopropyltrimethoxysilane (APTMS) and 3-mercaptopropyltriethoxysilane (MPTES) followed by gold colloidal. Atomic force microscopy (AFM) image showed the surface morphology of the well-separated immobilized AuNPs on a SiO2/p-Si. According to the programming operations, the memory device showed good programmable memory characteristics with 8 V memory windows with better characteristics, at last, thermal annealing for improving nonvolatile memory has been research.
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author2 |
Hsin-Chiang You |
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Hsin-Chiang You Sheng-Jyun Wu 吳昇峻 |
author |
Sheng-Jyun Wu 吳昇峻 |
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Sheng-Jyun Wu 吳昇峻 Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications |
author_sort |
Sheng-Jyun Wu |
title |
Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications |
title_short |
Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications |
title_full |
Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications |
title_fullStr |
Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications |
title_full_unstemmed |
Low-Temperature Zinc Oxide Thin Film Transistors with Direct Assembly of Gold Nano-particles Charge Trapping Layer with Thermal Annealing for Improving Nonvolatile Memory Applications |
title_sort |
low-temperature zinc oxide thin film transistors with direct assembly of gold nano-particles charge trapping layer with thermal annealing for improving nonvolatile memory applications |
publishDate |
2013 |
url |
http://ndltd.ncl.edu.tw/handle/18660353100626830874 |
work_keys_str_mv |
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