High-Performance Low-Power Carry Speculative Addition with Variable Latency
碩士 === 國立成功大學 === 資訊工程學系碩博士班 === 101 === Adders are one of the most critical arithmetic functional units in many applications. The overall performance of these arithmetic circuits depends on the throughput of the adder. Therefore, the execution time can be reduced by improving the performance of add...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54199366533819437912 |