System Design and FPGA Prototyping of 5 Gbps Transmission Indoor Wireless SC/OFDM Receiver
碩士 === 國立交通大學 === 電子研究所 === 101 === This thesis proposes a single carrier (SC) and high speed interface (HSI) dual mode wireless receiver which is designed and implemented for IEEE 802.15.3c standard. There are five main block functional blocks in the baseband receiver: boundary detector, sampling c...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/38288477110531894124 |