A 6 Gbps Delay-Locked-Loop-Based Clock and Data Recovery Circuit with an Infinite Phase Compensation Technique
碩士 === 國立中央大學 === 電機工程學系 === 101 === In recent year, according to the rapid evolution of process and computer network development, the various bandwidth requirement such as short distance like chip-to-chip communication and long distance like fiber-optic communication is increased. The use of serial...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/84813177936174575945 |