A Yield and Reliability Improvement Methodology and Its Hardware Design for Image Processing Circuits Applications
碩士 === 國立中山大學 === 電機工程學系研究所 === 101 === With the shrinking of the feature size of transistors, chips become more sensible to manufacturing defects and/or external noises, which may cause low manufacturing yield. In this thesis, we propose a methodology for improving yield and reliability of image pr...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/12707854813164772894 |