Nanometer Physical Design for Yield and Routability Enhancement
博士 === 國立清華大學 === 資訊工程學系 === 101 === In today’s nanometer IC (Integrated Circuit) processing, foundries are facing increasing challenges from process limitations that seriously impact the chip yield and reliability. To overcome these limits, numerous design rules are imposed by foundries to be follo...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/08080690622975790783 |