A Fully-Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput Applications
碩士 === 國立清華大學 === 電機工程學系 === 101 === In this thesis, we propose a Probabilistic Normalized Min-Sum Algorithm (PNMSA) for low-density parity-check (LDPC) decoders, where a probabilistic second minimum value is used in the check-node processing. Simulation results show that the proposed algorithm only...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/26617888119335096948 |