Realization of Multilevel-floorplanning on 3D-VLSI
碩士 === 國立臺北科技大學 === 電機工程系研究所 === 101 === Technology is updated continuously. The number of the modules on the chip was complicated. It intends to influence the wirelength and make the design fail. Thus, the 2D planar architecture gradually moved into 3D stack architecture in recent years. Most of th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/wzrtsf |