Develop An All-Digital Phase-locked Loop Compiler In Nanometer CMOS Technologies
碩士 === 國立中正大學 === 資訊工程研究所 === 102 === Phase-locked loop (PLLs) are widely used in a system-on-a-chip (SoC). In contrast to analog PLLs, all-digital phase-locked loops (ADPLLs) use digital design approaches which allows it to be easily integrated with other digital circuits into the systems in advanc...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/rfct5s |