The Design of Microwave CMOS Monolithic Phase-Locked Loops
碩士 === 國立中正大學 === 電機工程研究所 === 102 === This thesis implements two types of PLL, integer-N and fractional-N. Implemented in 0.18 μm CMOS technology, the first circuit is a 1.2 GHz integer-N PLL, using push-push cross-coupled voltage-control oscillator as circuit core. In addition, the second harmonic...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/37864x |