Efficient Micro-Bump Assignment for RDL Routing in 3D ICs
碩士 === 中華大學 === 資訊工程學系碩士班 === 102 === As the complexity increases and feature size decrease in modern VLSI designs, an IC can integrate more and more components. Hence, to satisfy the requirement of higher performance, 3D IC techniques are proposed. For single connections between two adjacent dies i...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2014
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Online Access: | http://ndltd.ncl.edu.tw/handle/60121612924670668018 |