Layer Assignment of Bus-Oriented Nets in High-Speed PCB Designs
碩士 === 中華大學 === 資訊工程學系碩士班 === 102 === As IC technology advances, the shrinkage in die size and the increase in functional complexity have made PCB designs become more and more difficult. It is know the increase of the pin count makes area routing difficult in high-speed PCB design. To satisfy the ti...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/73027603077739450108 |