The study of VDMOSFET with SIPOS termination in various temperature measurements

• Main Authors: Jian-Xiang Huang, 黃建翔
• Other Authors: Jyh-Ling Lin
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/72633812841226089227

碩士 === 華梵大學 === 電子工程學系碩士班 === 102 === For high power MOSFETs, in actually, the parallel junctions of devices are not infinite. However, the goal of termination design is to design the electric field of terminal close to that of parallel junction, let the potential redistribute and the electric field in the silicon substrate can be distributed to any area. Therefore, the design of power devices must be considered the breakdown voltage and the cost of area. This thesis is to study the electrical characteristics of VDMOSFET with SIPOS (Semi-Insulating Polycrystalline Silicon) termination in various temperature environments, owning similar properties as the commercially available components and maintaining stable characteristics. We set a number of different conditions in manufacture. A series measurement and analysis showed that the terminations with 95 um P- length and 5.8 um Poly extension FOX have higher breakdown voltage, and their leakage currents are more less than the devices with 95 um P- length and 0 um Poly extension FOX length. Comparing with RB2N60LGA-S, commercial product, they are similar including breakdown voltage, threshold voltage, source to drain voltage and on resistance under various temperatures. So the results can prove the devices with SIPOS terminations own smaller area also to keep similar characteristics and performance comparing with commercial components.