An Improvement on Wafer Edge Defects & Arcing Issues Reductions in Etching Processes
碩士 === 國立高雄應用科技大學 === 電子工程系碩士班 === 102 === For dielectric etching in advanced chip designs, the plasma damage phenomenon called "wafer arcing" and defects which are located at wafer edge area, are two main challenge problems. As for the arcing, it is randomly occurring and the arcing-induc...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/68g4zp |