Circuit Design of High Throughput Multi-mode LDPC Decoders for Communication Systems
碩士 === 國立中興大學 === 電機工程學系所 === 102 === In this thesis, VLSI circuit design and implementation of multi-mode low density parity check (LDPC) decoders for communication systems is presented. Owing to the demands of high data transmission rate and large variation of environment, the design is focused on...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/68750468120521353878 |