Fabrication and Application of Silicon Nanonet Field-Effect Transistors
碩士 === 國立成功大學 === 光電科學與工程學系 === 102 === Silicon nanonet field-effect transistors are fabricated using top-down approach with the help from oxygen plasma-treated Nanosphere Lithography. Cr nanonet is first deposited on top of a silicon-on-insulator (SOI) wafer and silicon nanonet membrane can be obta...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2014
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Online Access: | http://ndltd.ncl.edu.tw/handle/66015262857961484430 |