Design of the Multithreading Architecture for a Java Processor
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 102 === In this paper, we present the design of a four-core Java SoC with a centralized hardware thread manager and a coherent data cache controller across four processor cores. The Java processor core used in the SoC is based on the Java Application IP (JAIP) [1]. F...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/84392831306427439303 |