A Study on Asymmetrical MOSFETs and Junctionless Polycrystalline Silicon Thin-Film Transistors

博士 === 國立交通大學 === 電子物理系所 === 102 === In this dissertation, we have developed a novel double-patterning (DP) technique for generation of gate patterns with gate length down to 80 nm using only a conventional I-line stepper. With a modification in the process steps, this DP technique can further shrin...

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Bibliographic Details
Main Authors: Tsai, Tzu-I, 蔡子儀
Other Authors: Chao, Tien-Sheng
Format: Others
Language:en_US
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/28893693875539825696