Timing-Driven Three-Dimensional IC Floorplanning
碩士 === 國立交通大學 === 電信工程研究所 === 102 === The improvement in the semiconductor technology seems unable to maintain the Moore’s law. Therefore, three-dimensional (3-D) IC is imported to extend this limit. 3-D IC is to stack several 2-D ICs and use through silicon via (TSV) as iter-layer connection. In th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/09181999548837234573 |