ICEPL: A thermal-aware Placement for Temperature and Thermal Gradient Minimization
碩士 === 國立交通大學 === 電信工程研究所 === 102 === We propose two thermal optimal techniques with rough legalization in flat force-directed global placement which abates both on-chip peak temperature and thermal gradient. In order to make use of thermal forces, bases of thermal space inside the chip are used to...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/7uqkde |