Subway-CABC: A Yield-aware Subway Router for Capacitor Array Block Creation
碩士 === 國立中央大學 === 電機工程學系 === 102 === For the implementation of capacitors in the analog integrated circuits, it is to connect the unit capacitors corresponding to the total amount. The parasitic capacitance of interconnects greatly affects the Capacitance Ratio and induces the performance degradati...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/28639739768641550397 |