A 5-bit Flash ADC design with reduced comparators number
碩士 === 國立彰化師範大學 === 資訊工程學系 === 102 === In this thesis, a new 5-bit flash analog to digital converter(ADC), with multi-input multiplexer technique, is designed. The proposed Analog to Digital Converter has low transistor count compared with conventional ADC. The advantages of the ADC are low power...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/99360664486943374462 |