Efficiency Improvement and Analysis of Accessing Stacked Memories on Many-Core Platforms
碩士 === 國立清華大學 === 資訊工程學系 === 102 === Because of DRAM is its structural simplicity, high density per unit area and more inexpensive, it’s very suited to be a role of main-memory in computer architecture. However, from a historical point of view, since the DRAM was flourished, the rate of improvement...
Main Authors: | Chen, Huan-Wen, 陳煥文 |
---|---|
Other Authors: | Huang, Chih-Tsun |
Format: | Others |
Language: | en_US |
Published: |
2013
|
Online Access: | http://ndltd.ncl.edu.tw/handle/62576801445937981882 |
Similar Items
-
Design and Analysis of Memory Interface Architecture for Many-Core Platforms
by: Yeh, Kuo Kai, et al.
Published: (2015) -
Memory Hierarchy Design for Next Generation Scalable Many-core Platforms
by: Azarkhish, Erfan <1985>
Published: (2016) -
Design and Analysis of Inter-PE Communication on Many-Core Platform
by: Chen, Yu-Hsun, et al.
Published: (2012) -
Fault-Tolerant NoC Design and Analysis for Many-Core Platform
by: Chen, Wei-Ting, et al.
Published: (2013) -
Resource and thermal management in 3D-stacked multi-/many-core systems
by: Zhang, Tiansheng
Published: (2017)