Fabrication and Characterization of Enhancement-mode p-GaN/AlGaN/GaN HEMTs

碩士 === 國立清華大學 === 電子工程研究所 === 102 === In this thesis, enhancement-mode p-GaN/AlGaN/GaN HEMTs on a silicon substrate were fabricated. The p-type doped GaN and AlGaN/GaN barrier junction can be considered as a PN junction, so using p-type GaN as gate is able to deplete the 2DEG channel at a Vg=0V, t...

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Bibliographic Details
Main Authors: Hsiao, Tsung-Chieh, 蕭琮介
Other Authors: Huang, Chih-Fang
Format: Others
Language:zh-TW
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/78769138198386419357
Description
Summary:碩士 === 國立清華大學 === 電子工程研究所 === 102 === In this thesis, enhancement-mode p-GaN/AlGaN/GaN HEMTs on a silicon substrate were fabricated. The p-type doped GaN and AlGaN/GaN barrier junction can be considered as a PN junction, so using p-type GaN as gate is able to deplete the 2DEG channel at a Vg=0V, thus yielding a normally-off device. For the on-state characteristics, the threshold voltage (Vth) and the maximum transconductance (Gm,max) for the device with 2μm Lch, 5μm Lgs and 7μm Lgd is 0.3V and 45mS/mm. And the on-resistance and on/off current ratio is 3.43mΩ‧cm^2 and 10^8 for the same device. For the reverse breakdown characteristics, we use a thick buffer layer to reduce substrate leakage current and raise the capability of vertical breakdown voltage. The highest breakdown voltage for the device with Lgd=60μm is 2760V, and the best BFOM is 604 MW/cm^2 for the device with Lgd=20μm. A drain current instability that is different from the current collapse due to surface and bulk traps is observed and explained.