Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning

Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning

碩士 === 國立清華大學 === 電機工程學系 === 102

Bibliographic Details
Main Authors: Chiang, Jiun-Yi, 江俊毅
Other Authors: Liou, Jing-Jia
Format: Others
Language:en_US
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/05529026550494230966
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spelling ndltd-TW-102NTHU54420762016-03-09T04:34:23Z http://ndltd.ncl.edu.tw/handle/05529026550494230966 Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning 晶片群集相互資訊在多重時脈測試之應用 Chiang, Jiun-Yi 江俊毅 碩士 國立清華大學 電機工程學系 102 Liou, Jing-Jia 劉靖家 2014 學位論文 ; thesis 49 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 國立清華大學 === 電機工程學系 === 102
author2 Liou, Jing-Jia
author_facet Liou, Jing-Jia
Chiang, Jiun-Yi
江俊毅
author Chiang, Jiun-Yi
江俊毅
spellingShingle Chiang, Jiun-Yi
江俊毅
Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning
author_sort Chiang, Jiun-Yi
title Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning
title_short Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning
title_full Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning
title_fullStr Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning
title_full_unstemmed Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning
title_sort chip clustering with mutual information on multiple clock tests and its application to yield tuning
publishDate 2014
url http://ndltd.ncl.edu.tw/handle/05529026550494230966
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AT jiāngjùnyì jīngpiànqúnjíxiānghùzīxùnzàiduōzhòngshímàicèshìzhīyīngyòng
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