Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study

碩士 === 國立清華大學 === 工程與系統科學系 === 102 === The market demand for portable electric equipment increase dramatically year by year. Although transistors develop toward low cost and high density, maintaining device characteristics becomes difficult due to the device fabrication and physics limitations o...

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Main Authors: Chen, Yu-Hsiang, 陳郁翔
Other Authors: Wu, Yung-Chun
Format: Others
Language:en_US
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/55853140138680156399
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spelling ndltd-TW-102NTHU55930532016-03-09T04:31:11Z http://ndltd.ncl.edu.tw/handle/55853140138680156399 Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study 鰭式穿隧場效電晶體電性及可靠度之研究 Chen, Yu-Hsiang 陳郁翔 碩士 國立清華大學 工程與系統科學系 102 The market demand for portable electric equipment increase dramatically year by year. Although transistors develop toward low cost and high density, maintaining device characteristics becomes difficult due to the device fabrication and physics limitations of the device. Designing a device that different from conventional MOSFET is a necessary way. This thesis based on P-I-N structure tunnel field effect transistor which operated by quantum tunneling mechanism. Thus, compared with conventional MOSFET operated by drift mechanism, the Tunneling Transistor can achieve fast on/off characteristic and the OFF current can be decrease. This work is the first time to demonstrate the asymmetric gate tunnel FET. The device is based on SOI wafer. We design the gate structure above nanowire and planar to form asymmetric gate structure. The asymmetric gate structure has different control ability to channel. There is tri-gate structure on source and channel intrinsic junction and the control ability is good. It makes the screening length shorter and leads ION increase. There is planar structure on drain and channel intrinsic junction and the control ability is bad. It makes the screening length longer and leads IOFF smaller than tri-gate tunnel FET. The asymmetric gate tunnel FET has the SSmin 152mV/dec and SSavg 233mV/dec. ION gets to 7×10-7A and IOFF gets to 1×10-15A. The ON/OFF ration is 7×108. Compare to tri-gate tunnel FET and planar tunnel FET, the AG-TFET has the better electric characteristic. We also study in the reliability of AG-TFET. In positive bias stress and hot carrier stress analysis, the degradation behaviors after stress are investigated. The AG-TFET presents better reliability than tri-gate TFET after stress. The lesser degradation is due to the peaks of vertical electric field of AG-TFET is lower than tri-gate structure device. This work shows experimental data for device’s reliability; all the data can display asymmetric gate tunnel field effect transistor has applied to high value actually; it would become the next-generation device. Wu, Yung-Chun 吳永俊 2014 學位論文 ; thesis 51 en_US
collection NDLTD
language en_US
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description 碩士 === 國立清華大學 === 工程與系統科學系 === 102 === The market demand for portable electric equipment increase dramatically year by year. Although transistors develop toward low cost and high density, maintaining device characteristics becomes difficult due to the device fabrication and physics limitations of the device. Designing a device that different from conventional MOSFET is a necessary way. This thesis based on P-I-N structure tunnel field effect transistor which operated by quantum tunneling mechanism. Thus, compared with conventional MOSFET operated by drift mechanism, the Tunneling Transistor can achieve fast on/off characteristic and the OFF current can be decrease. This work is the first time to demonstrate the asymmetric gate tunnel FET. The device is based on SOI wafer. We design the gate structure above nanowire and planar to form asymmetric gate structure. The asymmetric gate structure has different control ability to channel. There is tri-gate structure on source and channel intrinsic junction and the control ability is good. It makes the screening length shorter and leads ION increase. There is planar structure on drain and channel intrinsic junction and the control ability is bad. It makes the screening length longer and leads IOFF smaller than tri-gate tunnel FET. The asymmetric gate tunnel FET has the SSmin 152mV/dec and SSavg 233mV/dec. ION gets to 7×10-7A and IOFF gets to 1×10-15A. The ON/OFF ration is 7×108. Compare to tri-gate tunnel FET and planar tunnel FET, the AG-TFET has the better electric characteristic. We also study in the reliability of AG-TFET. In positive bias stress and hot carrier stress analysis, the degradation behaviors after stress are investigated. The AG-TFET presents better reliability than tri-gate TFET after stress. The lesser degradation is due to the peaks of vertical electric field of AG-TFET is lower than tri-gate structure device. This work shows experimental data for device’s reliability; all the data can display asymmetric gate tunnel field effect transistor has applied to high value actually; it would become the next-generation device.
author2 Wu, Yung-Chun
author_facet Wu, Yung-Chun
Chen, Yu-Hsiang
陳郁翔
author Chen, Yu-Hsiang
陳郁翔
spellingShingle Chen, Yu-Hsiang
陳郁翔
Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study
author_sort Chen, Yu-Hsiang
title Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study
title_short Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study
title_full Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study
title_fullStr Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study
title_full_unstemmed Fin-Shape Tunnel Field-Effect Transistor Performance and Reliability Study
title_sort fin-shape tunnel field-effect transistor performance and reliability study
publishDate 2014
url http://ndltd.ncl.edu.tw/handle/55853140138680156399
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