Study of Novel Junctionless Field-Effect Transistors

碩士 === 國立清華大學 === 工程與系統科學系 === 102 === The junctionless transistor is proposed to be a future device because of the simple fabrication and suffered the suppression of On-current owing to the thin channel structure. The raised source and drain (RSD) structure is combined with the juncitonless transis...

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Bibliographic Details
Main Authors: Su, Jun Ji, 蘇俊吉
Other Authors: 吳永俊
Format: Others
Language:en_US
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/63899706390735573697
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Summary:碩士 === 國立清華大學 === 工程與系統科學系 === 102 === The junctionless transistor is proposed to be a future device because of the simple fabrication and suffered the suppression of On-current owing to the thin channel structure. The raised source and drain (RSD) structure is combined with the juncitonless transistor for the improvement of On-current. In the basic electrical measurement, the On-current of the RSD device almost reaches 1μA that is ten times for that of the non-RSD devices. The RSD juncitonless device gets the steep sub-threshold swing (SS=100mV/dec.) and the Off-current is low (10-14A) due to the remained thin channel structure. For reliability experiment, the temperature and the stress tests are taken for the RSD junctionless device. When the RSD junciotnlees device is heated up, the positive shifting of threshold voltage, degradation of SS and increase of the On-current as well as Off-current could be observed. The stress operation makes the electrical characteristics of the RSD junciotnless device changes due to the trapped carriers injected by gate at the edges of the gate insulator. The special structure of the N-type RSD juncitonless device called the dual gate is discussed. The two gates at the same layer would make the threshold voltage become tunable flexibly. For the N-type RSD juncitonless device, when the bias-gate voltage is negative, the Vth would shift toward the right side. When the bias gate voltage is positive, the Vth would shift toward the left side. It should be noticed that the shifts of Vth is linear regression with the bias gate voltage as well as the change of the On-current fits the quadratic regression. The new structure of the junctionless device is brought up called Hybrid P/N channel. The idea of the Hybrid P/N channel is intrigued by the bulk device. The different type layers are stacked as the channel to enhance the simplicity of the fabrication for the thin channel. The performance of the Hybrid P/N is good with the low SS (89mV/dec.). The simulation is added for proving the existence of the depeletion region.