RTL-to-TL Model Generation Based on Protocol Abstraction Techniques
碩士 === 國立臺灣大學 === 電子工程學研究所 === 102 === Simulation-based verification is a fundamental verification methodology for validating digital designs. The ever-increasing complexity of system arises from design growing from simple controllers to complex System-on-Chips (SoCs). The complexity leads to th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/13397534790692267303 |