Design of High-Speed Energy-Efficient Successive-Approximation Register Analog-to-Digital Converters
碩士 === 國立臺灣大學 === 電子工程學研究所 === 102 === This dissertation proposes two circuit design techniques for high-speed energy-efficient successive-approximation register (SAR) analog-to-digital converters (ADCs). According to the measurement results of the proof-and-concept prototypes, the proposed techni...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2014
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Online Access: | http://ndltd.ncl.edu.tw/handle/39481166797197627137 |