The 10-bit 10-MHz Continuous-Time Sigma-Delta ADC Chip Design for 4G LTE Applications
碩士 === 國立臺灣科技大學 === 電子工程系 === 102 === In this thesis, a 10 MHz CT ΣΔ modulators are designed and fabricated with TSMC 0.18um CMOS. The continuous time lowpass ΣΔ ADC for 4G LTE applications. The modulator is fabricated and taped out. In this chip, CICFF topology is applied. Compared with conventiona...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/268yhu |