Design of an Analog (8,4) LDPC Sum-Product Decoder Employing New Advance Detection Method
碩士 === 國立臺北科技大學 === 電子電腦與通訊產業研發碩士專班 === 102 === This thesis proposes an Analog (8,4) LDPC Sum-Product Decoder using Advance Detection method. It is based on the sum-product algorithm and by checking parity H-matrix to decide iteration termination meanwhile, a new advance detection method is also pro...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/263fyb |