Hardware Realization and FPGA Verification of Adaptive Voltage Scaling on Digital Filters
碩士 === 國立中正大學 === 資訊工程研究所 === 103 === Adaptive voltage scaling (AVS) has already been successfully applied in low-power processor and datapath designs. This study tries to apply AVS in memory designs, 78% power reduction has been observed in a lookup-table (LUT)-based digital filter, where 6 extra S...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/3w53qj |