Design and Implementation of NoC Simulation Framework for Multicore NUCA

碩士 === 逢甲大學 === 資訊工程學系 === 103 === Many-core system requires large shared on-chip cache memory to enhance the performance of data access between cores. In traditional SoC, bus architecture is used for communication, which may cause bottleneck when the number of cores increase. In order to solve prob...

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Bibliographic Details
Main Authors: Han Chuan Su, 蘇瀚川
Other Authors: 張貴忠
Format: Others
Language:en_US
Published: 2015
Online Access:http://ndltd.ncl.edu.tw/handle/44860585537316894853