Design of the Viterbi Decoder for Convolutional Code Application
碩士 === 龍華科技大學 === 電子工程系碩士班 === 103 === In this thesis we propose the design and implementation of convolutional code encoder/decoder with FPGA. Compared to encoder, the complexity of Viterbi decoder is much more severe. We select the register exchange architecture in the design of survivor path modu...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/46596972005960780035 |