Effective 2.5D IC Chip Module Warpage With Underfill Materoal Design By Analytical Method

碩士 === 國立中興大學 === 物理學系所 === 103 === Three dimensional (3D) stacking technologies have been popular among in high level package that can meet miniaturization trend, high performance, and multi-function electronic products. The interposer where the chips are stacked on is an electrical interface ro...

Full description

Bibliographic Details
Main Authors: Pai-Yuan Li, 李百淵
Other Authors: 鄭建宗
Format: Others
Language:zh-TW
Published: 2015
Online Access:http://ndltd.ncl.edu.tw/handle/75659045063355164960