Predicting Shot-Level SRAM Read/Write Margin based on Measured Transistor Characteristics
碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 103 === An SRAM-array test structure provides the capability of directly measuring the characteristics of each transistor and the read/write metrics for each SRAM cell in the array. However, the total test time of measuring the read/write metrics takes longer than...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/04784665373896349940 |