Energy-efficient Level Converting Flip-Flop for Ultra-Low-Power Systems
碩士 === 國立交通大學 === 電機資訊國際學程 === 103 === This thesis proposes a novel design of level shifter flip-flop cell for the applications in ultra-low voltage systems. In order to reduce a power dissipation, several approaches have been suggested and successfully implanted in modern designs. One of them is to...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/78021244821647317419 |