Global Optimizations in Compilers for VLIW DSP Processors with Distributed Register Files
博士 === 國立清華大學 === 資訊工程學系 === 103 === Abstract Digital signal processors (DSPs) with very long instruction word (VLIW) data-path architectures are increasingly being deployed on embedded devices for multimedia processing applications. While developing new VLIW DSP processors, engineers always take c...
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| Format: | Others |
| Language: | en_US |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/89728810996706561122 |