Trim Mask Optimization for HybridMultiple Pattering Lithography
碩士 === 國立臺灣科技大學 === 電機工程系 === 103 === Due to the delay of next generation lithography technologies, multiple patterning lithography technologies are still regarded as one of the most promising solutions for sub-20nm technology nodes. In self-aligned multiple patterning lithography, the misalignment...
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ndltd-TW-103NTUS54421422017-01-14T04:15:29Z http://ndltd.ncl.edu.tw/handle/22198748154865124721 Trim Mask Optimization for HybridMultiple Pattering Lithography 考慮混合多重圖案微影技術的擷取光罩最佳化 Yin-Lu Chang 張尹律 碩士 國立臺灣科技大學 電機工程系 103 Due to the delay of next generation lithography technologies, multiple patterning lithography technologies are still regarded as one of the most promising solutions for sub-20nm technology nodes. In self-aligned multiple patterning lithography, the misalignment between the trim mask and the mandrel mask does not a affect the printed target pattern due to the protection of spacers. Therefore, one-dimensional (1-D) wire layout structure will be more suitable to fabricate. However,the severe pattern distortion increases due to the complicated trim patterns are limited by the resolution of conventional optical lithography. In this thesis, we propose the first work that adopts litho-etch-litho-etch double patterning lithography(LELE-DPL) for the trim process. First, the depth first search algorithm will be adopted to find all the trim patterns in a given routing layout. In order to resolve an odd cycle, which is formed to the trim patterns for litho-etch-litho-etch double pattern- ing lithography, the stitch is introduced to increase layout decomposition. Unlike the stitch finding algorithm has been used recently, the sophistic stitch could insert in both vertical and horizontal directions on trim patterns. Then, we propose a systematic flow to find both vertical and horizontal stitch locations without violation. Note that the rounding errors of wire segments cut by a vertical stitch could damage pattern printability, so only if horizontal stitches cannot resolve a conflict, we will try to insert a vertical stitch. Based on the conflict between each trim patterns and the location of stitch candidates, the conflict for the trim process is constructed. According to the conflict graph, we propose an integer linear programming(ILP) formulation with color balancing consideration to simultaneously minimize coloring conflicts and inserted stitches. Experimental results demonstrate the effectiveness of the illegal trim patterns reduction and increases the trim patterns fabrication. Shao-Yun Fang 方劭云 2015 學位論文 ; thesis 46 en_US |
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碩士 === 國立臺灣科技大學 === 電機工程系 === 103 === Due to the delay of next generation lithography technologies, multiple patterning lithography technologies are still regarded as one of the most promising solutions for sub-20nm technology nodes. In self-aligned multiple patterning lithography, the misalignment between the trim mask and the mandrel mask does not a affect the printed target pattern due to the protection of spacers. Therefore, one-dimensional (1-D) wire layout structure will be more suitable to fabricate. However,the severe pattern distortion increases due to the complicated trim patterns are limited by the resolution of conventional optical lithography. In this thesis, we propose the first work that adopts litho-etch-litho-etch double patterning lithography(LELE-DPL) for the trim process. First, the depth first search algorithm will be adopted to find all the trim patterns in a given routing layout. In order to resolve an odd cycle, which is formed to the trim patterns for litho-etch-litho-etch double pattern-
ing lithography, the stitch is introduced to increase layout decomposition. Unlike the stitch finding algorithm has been used recently, the sophistic stitch could insert in both vertical and horizontal directions on trim patterns. Then, we propose a systematic flow to find both vertical and horizontal stitch locations without violation. Note that the rounding errors of wire segments cut by a vertical stitch could damage pattern printability, so only if horizontal stitches cannot resolve a conflict, we will try to insert a vertical stitch. Based on the conflict between each trim patterns and
the location of stitch candidates, the conflict for the trim process is constructed. According to the conflict graph, we propose an integer linear programming(ILP) formulation with color balancing consideration to simultaneously minimize coloring conflicts and inserted stitches. Experimental results demonstrate the effectiveness of the illegal trim patterns reduction and increases the trim patterns fabrication.
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author2 |
Shao-Yun Fang |
author_facet |
Shao-Yun Fang Yin-Lu Chang 張尹律 |
author |
Yin-Lu Chang 張尹律 |
spellingShingle |
Yin-Lu Chang 張尹律 Trim Mask Optimization for HybridMultiple Pattering Lithography |
author_sort |
Yin-Lu Chang |
title |
Trim Mask Optimization for HybridMultiple Pattering Lithography |
title_short |
Trim Mask Optimization for HybridMultiple Pattering Lithography |
title_full |
Trim Mask Optimization for HybridMultiple Pattering Lithography |
title_fullStr |
Trim Mask Optimization for HybridMultiple Pattering Lithography |
title_full_unstemmed |
Trim Mask Optimization for HybridMultiple Pattering Lithography |
title_sort |
trim mask optimization for hybridmultiple pattering lithography |
publishDate |
2015 |
url |
http://ndltd.ncl.edu.tw/handle/22198748154865124721 |
work_keys_str_mv |
AT yinluchang trimmaskoptimizationforhybridmultiplepatteringlithography AT zhāngyǐnlǜ trimmaskoptimizationforhybridmultiplepatteringlithography AT yinluchang kǎolǜhùnhéduōzhòngtúànwēiyǐngjìshùdexiéqǔguāngzhàozuìjiāhuà AT zhāngyǐnlǜ kǎolǜhùnhéduōzhòngtúànwēiyǐngjìshùdexiéqǔguāngzhàozuìjiāhuà |
_version_ |
1718408350920605696 |