Development of Modularized Conductive Plate in Electro-Kinetic Force Assisted Chemical Mechanical Planarization for Through-Silicon-Via Wafer Planarization
碩士 === 國立臺灣科技大學 === 機械工程系 === 103 === As rapid development of semiconductor industry, three dimensional stacking integrated circuit (3DS-IC) has been considered to be a critical technology to break through Moore’s Law. For 3DS-IC, the Through–Silicon-Via (TSV) wafer is usually used as an interposer...
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| Format: | Others |
| Language: | zh-TW |
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2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/59362436768696727281 |