Step Coverage Study of Through Silicon Via in Sputter Process
碩士 === 國立高雄大學 === 電機工程學系--先進電子構裝技術產業研發碩士專班 === 103 === This thesis studied the step coverage performance of titanium-copper (Ti-Cu) in silicon wafer with different via width and depth in sputter process. The film uniformities in the deposition of Ti and Cu respectively with different platen power an...
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| Format: | Others |
| Language: | zh-TW |
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2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/39289694403950281787 |
| Summary: | 碩士 === 國立高雄大學 === 電機工程學系--先進電子構裝技術產業研發碩士專班 === 103 === This thesis studied the step coverage performance of titanium-copper (Ti-Cu) in silicon wafer with different via width and depth in sputter process. The film uniformities in the deposition of Ti and Cu respectively with different platen power and chamber pressure were studied first. With this, the optimal parameters were selected for further stacked Ti-Cu deposition process. The step coverage for the Ti-Cu on the through silicon via (TSV) was studied then with three different width and depth. The TSV cross-section was characterized by scanning electron microscope (SEM) at different positions. The Ti-Cu coverage behavior on TSV were discussed and the well coverage performance be achieved with controlled parameters.
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