The Design of a 10b 100MS/s Pipelined ADC and a 10b 20MS/s SAR ADC

碩士 === 國立臺北科技大學 === 電子工程系研究所 === 103 === The first part of this thesis title is a 10b 100MS/s Non-Flip-Around MDAC for Pipelined ADC. It is implemented in 0.18-um CMOS technology with a power supply of 3V. It is mainly to reduce switch using in high speed applications. Provided less effects of switc...

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Bibliographic Details
Main Authors: Yung Zeng Wu, 吳勇增
Other Authors: 黃育賢
Format: Others
Language:en_US
Online Access:http://ndltd.ncl.edu.tw/handle/sg35ew