The Design and Implementation of a Digital Interleaved SEPIC Power Factor Corrector
碩士 === 大同大學 === 電機工程學系(所) === 103 === This thesis proposes a digital interleaved SEPIC power factor corrector based on microcontroller. First, the SEPIC topology is adopted as the main circuit to possess buck and boost function. Moreover, the microcontroller incorporated with interleaved switching t...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/23711016725178013487 |